Technique Outline

■Outline
●IEEE 802.11n/ac chipset development

［System examples ］
・Next generation wireless LAN chipset (IEEE 802.11n/ac)
・13 segments digital terestrial broadcasting system
・MIMO system prototype board
・MIMO system IP (RTL)
・ASIC & FPGA level design
・MIMO-OFDM PHY simulator

●IP development of digital communication systems
［System examples］
・Next generation wireless LAN 802.11n/ac
・Power line communication
・Mobile communication system
・Development of various digital communication systems, like high definition mobile systems, digital terrestrial television broadcasting
・ASIC & FPGA level design
・DSP coding

［Core technology ］
・Digital modulation & demodulation circuits, like OFDM/QAM
・Adapative equalizer, like multiple access method MC-CDMA
・Synchronization circuit
・Turbo decoder error correction circuit
・MIMO space time coding systems, like SMART antenna STC
・Audio and video compression – decompression techniques & technology development

■IP
●Digital modulation – demodulation related
・Various modulation – demodulation circuits
・Roll-off filter
・Synchronization circuit
・Soft output de-mapper
●OFDM related
・Circuit and FFT (64 – 8192 points)
・Channel estimation
・Phase compensation
・Synchronziation circuiit, etc
●Equalizer related
・LMS
・MMSE
・DFE
・CMA, etc

●Error correction code related
・Convolutional code
・Reed solomon
・Viterbi
・LDPC
・Turbo code (SOVA, Max-logMap, BCJR, etc)
・Various interleaver, etc

●MIMO related
・Adapative array antenna (SMART antenna)
・Space tiime coding (STBC)
・Space division multiplexing (SVD)
〔RTL support, etc〕

■Contact for product development
Phone : +81 948-29-7937
Email ：support(at_mark)radrix.com
URL : http://www.radrix.com/